About Me:
Verilog and Vimthusiast.
Working in the electronics industry, Audio ASICs specifically.
Welcome constructive feedback via comments to my answers and questions, Edits to correct grammar, spelling, adding context or expanding answers are also welcomed/wanted. This is generally frowned upon but I think this leads to better answers quicker, it is easier for me and bad edits can be rolled back.
I occasionally add Answer & Question combos for basic questions which come up time and again but never in a generic format with useful titles.
Some Quick Verilog Guides written in the Q&A style
- How to implement a (pseudo) hardware random number generator.
- Verilog: How to instantiate a module.
A common question is how to use fractional numbers with Verilog a handfull of my answers on this subject:
- Verilog: fixed-point
- Verilog: number bases
- Verilog: quantisation
- Twos-complement negative
The SystemVerilog IEEE 1800-2012 Standard
My guidance on where to post HDL Questions:
HDL (Verilog/VHDL) questions are welcome on SO, but when questions relate directly to synthesised area, to me that is not programming it is hardware design. Loading designs on to FPGA is a physical problem related to electronic devices and there related toolset. I consider these questions to be more suited to Electronics SE.
This is my opinion and not a general consensus.
Some quotes
Drunk fly on cross-country skis in tornado.
Jonathan Roth on the phase response of an elliptic filter.
Next section is shamelessly copied from johnsyweb, he left no contact details so I can not even let him know :(
On Down-voting :
About two percent of my votes are down-votes, which I think is quite low. Down-voting is an important part of StackExchange and helps separate the good answers (and questions) from the not-so-good. If I have down-voted one of your posts, I will try to leave a comment as to why. If you down-vote one of my posts, I ask that you, too, leave a comment as to why so that I can either improve my post or remove it. Thank you.
